1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, it relates to a vertical field effect semiconductor device and a method of fabricating the same.
2. Description of the Background Art
FIG. 22 is a sectional view showing the structure of a conventional N-channel IGBT. As shown in FIG. 22, an N.sup.+ -type buffer layer 2 is formed on a P.sup.+ -type substrate 1, and an N.sup.- -type layer 4 is formed on the N.sup.+ -type buffer layer 2.
P-type base regions 5 are selectively formed in a surface of the N.sup.- -type layer 4, and N-type emitter regions 6 are selectively formed in surfaces of the P-type base regions 5. A gate insulating film 8 is formed end portions of the emitter regions 6 located on the P-type base regions 5, so that a gate electrode 9 is formed on this gate insulating film 8. Namely, an N-channel DMOS (diffusion self-alignment MOS) is formed on the surface of the N.sup.- -type layer 4.
Further, emitter electrodes 10 are formed on parts of the P-type base regions 5 and the N-type emitter regions 6, while a collector electrode 11 is formed on a rear surface of the P.sup.+ -type substrate 1.
In such a structure, a collector voltage V.sub.CE of a prescribed level is applied across the emitter electrodes 10 and the collector electrode 11 while grounding the emitter side, and a gate voltage V.sub.GE of an operating level is applied across the gate electrode 9 and the emitter electrodes 10. Thus, channel regions 7, which are surface regions of the P-type base regions 5 located under the gate electrode 9, are inverted to N-type regions. Therefore, electrons from the emitter electrodes 10 are injected into the N.sup.- -type layer 4 through the channel regions 7. The P.sup.+ -type substrate 1 and the N.sup.- -type layer 4 are forward biased by the electrons injected into the N.sup.- -type layer 4. As a result, the P.sup.+ -type substrate 1 injects holes into the N.sup.- -type layer 4, whereby resistance of the N.sup.- -type layer 4 is extremely reduced and current capacitance of the device is increased. This is an ON state of the IGBT.
When a gate voltage of a non-operating level is applied to the gate electrode 9, on the other hand, the channel regions 7 return to P-type regions to shift the IGBT to an OFF state. In this case, a certain degree of time is required for disappearance of the holes injected into the N.sup.- -type layer 4. Namely, a prescribed time from application of the non-operating level gate voltage to the gate electrode 9 to complete disappearance of the holes in the N.sup.- -type layer 4 and the N.sup.+ -type buffer layer 2 is required for completely stopping the current flowing in the IGBT during a turn-off operation time.
The N.sup.+ -type buffer layer 2 functions as a lifetime killer for controlling the holes injected into the N.sup.- -type layer 4, so that the turn-off time can be reduced by presence of this N.sup.+ -type buffer layer 2. The N.sup.+ -type buffer layer 2 is also adapted to suppress depletion layers extending from P-N junctions formed in interfaces between the P-type base regions 5 and the N.sup.- -type layer 4 toward the N.sup.- -type layer 4 in an OFF state of the IGBT, whereby the N.sup.- -type layer 4 can be reduced in thickness.
It has been empirically recognized that a surge voltage (emitter-to-collector voltage V.sub.CE) is increased in a turn-off state of an IGBT having such a conventional structure.
A typical IGBT of such a conventional structure is a 600 V system IGBT which operates with a collector-to-emitter voltage V.sub.CE of 300 V, whose N.sup.- -type layer 4 has resistivity .rho. of 30.OMEGA. cm (impurity concentration: 1.57.times.10.sup.14 cm.sup.-3) and a thickness of 60 .mu.m.
The inventor experimentally fabricated an IGBT of 100 A having a conventional structure, to evaluate a surge voltage in a switching-off state of the IGBT in a half bridge circuit, under measurement conditions of V.sub.CE =300 V, V.sub.GE =.+-.15 V and a junction temperature (device temperature) of 125.degree. C.
As the result, a relatively large surge voltage of about 550 V was measured. From the result of this experiment, it has been proved that such an IGBT of a conventional structure cannot suppress a surge voltage in a turn-off state.